Nguyen Ngoc Binh

Nguyen Ngoc BINH

Profile

  • Bachelor’s degree in applied mathematcs from Chisinau State University (now Moldova State University), Master’s degree in engineering from the Graduate School of Engineering of Toyohashi University of Technology, Graduate School of Engineering Science of Osaka University (Doctor of Engineering), professor emeritus from Toyohashi University of Technology
  • Former Rector of the VNU University of Engineering and Technology (VNU-UET), Former Director of the International Francophone Research Institute (VNU-IFI), Former Director of the Library and Information Network Center (HUT-LINC), Hanoi Institute of Technology
  • Member of ACM/IEEE; Insttute of Electronics, Informaton and Communicaton Engineers (IEICE ); Vietnam Associaton for Informaton Processing (VAIP); former Internatonal Advisor to the Natonal Insttute of Informaton and Communicatons Technology (NICT), former President of the Radio and Electronics Associaton of Vietnam (REV).
  • Former President of Vietnam Associaton of Japan Alumni (VAJA), former Chairman of the ASEAN Council of Japan Alumni (ASCOJA), former Director of ASJA Internatonal (under Japan Ministry of Foreign Affairs), former Vice President of Vietnam-Japan Friendship Associaton (VJFA).
  • Vice President, The Kyoto College of Graduate School for Informatics

Message

"Realize your dreams with your fellow "global citizens.

As innovation in science and technology accelerates economic and social development and globalization more and more, Japan is developing "Society 5.0" building a super smart society centered on people in order to meet social demand.

In Europe and many other countries, so called the Fourth Industrial Revolution was realized, with intellectual production at the center of production and social development. There are similarities between Japan's Society 5.0 and the Fourth Industrial Revolution.It incorporates high-speed Internet connectivity based on information and communication technologies, IoT, AI, big data, smart machines, knowledge management, and so on.Under these circumstances, ICT plays an important role as the center of industrial development in connecting various fields to meet social demand. On the other hand, social demand is creating new challenges to promote ICT research and development through industry.

The Kyoto College of Graduate Studies for Informatics has a long tradition in education and research in applied information technology.We have experienced faculty members who have had active roles at universities and research institutes in Japan and overseas, as well as practitioners who have been active in various Japanese companies. It is a place where advanced professionals, ICT application engineers, and students who dream of becoming top managers can acquire cutting-edge knowledge in information technology and related fields. We are contributing to the development of ICT human resources necessary for Society 5.0 and the Fourth Industrial Revolution by fostering "global citizens".

Learn from KCGI with friends from around the world and realize your dreams.

Responsible Subject

  • Software Engineering
  • Advanced Topics in Information Ethics
  • Honors Master Thesis

Field of Specialization

  • Cooperative Design Optimization Method for Embedded Systems
  • Software Engineering
  • Knowledge science (Data Science, AI, Big Data, KDD & DM)

Business Performance

  • C.T.M.Hue, D.D. Hanh, and N.N. Binh: "USLTG: A Test Case Automatic Generation by Transforming Use Cases," Int'l Journal of Software Engineering and Knowledge Engineering Journal IJSEKE, 2019. ISSN (online): 1793 -6403 (Accepted, ISI indexed).
  • C.T.M.Hue,D.D.Hanh,N.N.Binh,and L.M. Duc:“USL: A Domain-Specific Language for Precise Specification of Use Cases and Its Transformations,”Int’l journal Informatica,Vol 42(3), pp. 323-343, 2018. ISSN0350 -5596. (Scopus indexed)
  • N. Binh: "Instruction Set Optimization for ASIP Design," VNU Publisher, Hanoi, 2017, June 2017 (ISBN: 978 -604 -934 -862 -4)
  • T.N.Phu, N.Q. Dzung, L.V. Hoang, and N.N. Binh: “Towards Malware Detection in Routers with C500-toolkit,” Proc. of the ICoICT 2017 Conference, Malaysia, 17-19 May 2017.
  • N.N.Binh, P.V. Huong, and B.N. Hai: “A New Approach to Embedded Software Optimization based on Reverse Engineering,” IEICE Trans. on Information and Systems, Vol.E98-D, No.6, pp. 1166-1175, June 2015.
  • N. Binh: "Embedded Software Engineering, Inc." VNU Publisher, Hanoi, 2014 (Textbook)
  • P.V.Huong, N.N. Binh, and P.N. Thanh: “Optimizing Occupied Memory of Embedded Software in the Design Phase,” Journal of Computer Science and Cybernetics, V.28, N.3, pp. 234-244, 2012.
  • P.V.Huong and N.N. Binh: ”Design and Generating Code for Embedded Systems Based on DSL and T4,” Journal of Computer Science and Cybernetics, V.28, N.4, pp. 323-332, 2012.
  • P.V.Huong and N.N. Binh: “Embedded System Architecture Design and Optimization at the Model Level,” Int’l Journal of Computer and Communication Engineering (IJCCE), Vol. 1, No. 4, pp. 345-349, Nov. 2012. (ISSN: 2010 -3743).
  • Ho,T.B., Kawasaki, S., and Nguyen, N.B. (N.N. Binh): “Cluster-based Information Retrieval with Tolerance Rough Set Model,” Int’l Journal of Fuzzy Logic and Intelligent System, pp. 26-32, Vol. 1. Extension of the paper in Proc. of the 2nd Int’l Symposium on Advanced Intelligent Systems, pp. 6-11. Korea, Aug. 2001.
  • Ho,T.B. and Nguyen, N.B. (N.N. Binh): “Document Clustering by Tolerance Rough Set Model,” Int’l Journal of Intelligent Systems, pp. 199-212, Vol.17. John Wiley & Sons, Inc., 2002.
  • N.N.Binh, M. Imai, and Y. Takeuchi: “A Performance Maximization Algorithm to Design ASIPs under the Constraint of Chip Area Including RAM and ROM Sizes,” Proc. of ASP-DAC'98, pp. 367-372, Yokohama, Japan, Feb. 1998.
  • N.N.Binh, M. Imai, and Y. Takeuchi: “An Optimization Algorithm for High Performance ASIP Design with Considering the RAM and ROM Sizes,” IEICE Trans. Fundamentals, Vol.E81-A, No.12, pp.2612 - 2620, Dec. 1998.
  • N.N.Binh, M. Imai, A. Shiomi, and N. Hikichi: “A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts,” Proc. of the 33rd IEEE/ACM Design Automation Conference (DAC'96), pp. 527-532, Las Vegas, USA, Jun. 1996.
  • N.N.Binh, M. Imai, A. Shiomi, and N. Hikichi: “Optimal Instruction Set Design through Adaptive Database Generation,” IEICE Trans. Fundamentals, Vol. E79-A, No.3, pp. 347 - 353, Mar. 1996.
  • N.N.Binh, M. Imai, A. Shiomi, N. Hikichi, Y. Honma, and J. Sato: “An Efficient Scheduling Algorithm for Pipelined Instruction Set Processor and Its Application to ASIP Hardware/Software Codesign,” IEICE Trans. Fundamentals, Vol.E78-A, No.3, pp. 353-362, Mar. 1995.
  • N.N.Binh, M. Imai, A. Shiomi, and N. Hikichi: “An Instruction Set Optimization Algorithm for Pipelined ASIPs,” IEICE Trans. Fundamentals, Vol.E78-A, No.12, pp. 1707-1714, Dec.1995.

Awards

  • Best Paper Award, The Institute of Electronics, Information and Communication Engineers, Tokai Section
  • Japan Foreign Ministry Prize
  • Osaka University Global Alumni Fellow